BE Civil Engineering (IOE, TU) Basic Electronics Engineering (IOE, EX 451) Question Paper 2077 Nepal

(a) Circuit and operation

          D1
  o------|>|------+
  |              |
[sec1]           |
  |              +---[R_L]---+
CT o-------------+           |
  |              |           |
[sec2]           |           |
  |              |           |
  o------|>|-----+-----------+
          D2

The centre tap (CT) is the load return. On the positive half-cycle the upper winding forward-biases D1 (D2 reverse-biased); on the negative half-cycle the lower winding forward-biases D2 (D1 reverse-biased). In both half-cycles current flows through $R_L$ in the same direction, giving full-wave rectification with output frequency $2\times 50 = 100\,\text{Hz}$.

(b) Peak, DC current and DC voltage

Peak secondary voltage of each half:

$$V_m = \sqrt{2}\times 18 = 25.46\,\text{V}$$

Only one diode conducts at a time, so subtract one diode drop:

$$I_m = \frac{V_m - V_D}{R_L} = \frac{25.46 - 0.7}{220} = \frac{24.76}{220} = 0.1126\,\text{A} = 112.6\,\text{mA}$$

For a full-wave rectifier:

$$I_{dc} = \frac{2 I_m}{\pi} = \frac{2\times 0.1126}{\pi} = 0.07165\,\text{A} = 71.65\,\text{mA}$$ $$V_{dc} = I_{dc}\,R_L = 0.07165\times 220 = \mathbf{15.76\,V}$$

(c) RMS current, ripple, efficiency, PIV

RMS load current (full-wave):

$$I_{rms} = \frac{I_m}{\sqrt{2}} = \frac{0.1126}{\sqrt 2} = 0.0796\,\text{A} = 79.6\,\text{mA}$$

Ripple factor:

$$r = \sqrt{\left(\frac{I_{rms}}{I_{dc}}\right)^2 - 1} = \sqrt{\left(\frac{0.0796}{0.07165}\right)^2 - 1} = \sqrt{1.2338 - 1} = \sqrt{0.2338} = \mathbf{0.483}$$

(This matches the standard full-wave value $r \approx 0.48$.)

Rectifier efficiency:

$$\eta = \frac{P_{dc}}{P_{ac}} = \frac{I_{dc}^2 R_L}{I_{rms}^2 R_L} = \left(\frac{0.07165}{0.0796}\right)^2 = (0.9001)^2 = 0.8102 = \mathbf{81.0\%}$$

Peak Inverse Voltage: when one diode conducts, the non-conducting diode sees both halves of the secondary:

$$\text{PIV} = 2V_m = 2\times 25.46 = \mathbf{50.9\,V}$$

(a) Stability

The divider $R_1$–$R_2$ fixes the base voltage $V_B$ nearly independent of $I_B$. With an emitter resistor $R_E$, the emitter voltage follows $V_B$, so $I_E \approx (V_B - V_{BE})/R_E$ is set by resistors, not by $\beta$. If $\beta$ rises, $I_C$ tends to rise, $V_E$ rises, $V_{BE}$ falls, which throttles back $I_B$ — negative feedback that holds the $Q$-point fixed.

(b) Thevenin analysis

Thevenin voltage and resistance at the base:

$$V_{TH} = V_{CC}\frac{R_2}{R_1+R_2} = 15\times\frac{8.2}{47.2} = 2.606\,\text{V}$$ $$R_{TH} = R_1\parallel R_2 = \frac{39\times 8.2}{47.2} = 6.776\,\text{k}\Omega$$

Base loop (KVL):

$$V_{TH} = I_B R_{TH} + V_{BE} + I_E R_E,\quad I_E = (\beta+1)I_B$$ $$I_B = \frac{V_{TH} - V_{BE}}{R_{TH} + (\beta+1)R_E} = \frac{2.606 - 0.7}{6.776 + 121\times 1} = \frac{1.906}{127.776\,\text{k}\Omega}$$ $$I_B = 14.92\,\mu\text{A}$$ $$I_C = \beta I_B = 120\times 14.92\,\mu\text{A} = \mathbf{1.790\,mA}$$ $$I_E = (\beta+1)I_B = 121\times 14.92\,\mu\text{A} = \mathbf{1.805\,mA}$$

(c) $V_{CE}$ and region check

$$V_{CE} = V_{CC} - I_C R_C - I_E R_E = 15 - (1.790\times 2.2) - (1.805\times 1)$$ $$V_{CE} = 15 - 3.938 - 1.805 = \mathbf{9.26\,V}$$

Since $V_{CE} = 9.26\,\text{V}$ is well above $V_{CE(sat)}\approx 0.2\,\text{V}$ and below $V_{CC}$, and the base-emitter junction is forward biased, the transistor operates in the active region.

(a) Ideal assumptions and inverting gain

Ideal op-amp: (i) infinite open-loop gain, (ii) infinite input impedance (no current into inputs), (iii) zero output impedance, (iv) infinite bandwidth. With negative feedback the two inputs are at the same potential (virtual short); the non-inverting input is grounded, so the inverting node is a virtual ground ($V_- = 0$).

KCL at the inverting node (no current into the op-amp):

$$\frac{V_{in}-0}{R_1} = \frac{0 - V_o}{R_f}$$ $$\boxed{A_v = \frac{V_o}{V_{in}} = -\frac{R_f}{R_1}}$$

(b) Summing amplifier output

For a summing inverting amplifier:

$$V_o = -R_f\left(\frac{V_1}{R_a}+\frac{V_2}{R_b}+\frac{V_3}{R_c}\right)$$

Compute each input current term:

$$\frac{V_1}{R_a} = \frac{0.5}{10\,\text{k}} = 0.05\,\text{mA}$$ $$\frac{V_2}{R_b} = \frac{-1.2}{20\,\text{k}} = -0.06\,\text{mA}$$ $$\frac{V_3}{R_c} = \frac{0.8}{5\,\text{k}} = 0.16\,\text{mA}$$

Sum $= 0.05 - 0.06 + 0.16 = 0.15\,\text{mA}$

$$V_o = -40\,\text{k}\Omega \times 0.15\,\text{mA} = \mathbf{-6.0\,V}$$

(a) K-map and minimisation

Minterms present: 0,1,2,5,8,9,10,13. Map (rows $AB$, columns $CD$ in Gray order 00,01,11,10):

Grouping:

• Column CD=01 (m1,5,13,9): all four cells = 1 → term $\bar C D$.
• Cells where CD=00 and CD=10 with B=0 i.e. m0,m2,m8,m10 (corners of the B=0 region, $D=0$): these four 1's share $\bar B\,\bar D$ → term $\bar B\,\bar D$.

Check coverage: $\bar C D$ covers 1,5,9,13. $\bar B \bar D$ covers 0,2,8,10. Together = {0,1,2,5,8,9,10,13} = all minterms.

$$\boxed{F = \bar B\,\bar D + \bar C D}$$

(b) NAND-only implementation

Convert SOP to NAND-NAND using De Morgan:

$$F = \overline{\overline{(\bar B\,\bar D)}\cdot\overline{(\bar C D)}}$$

Gates needed (two-input NAND):

• Inverters for $\bar B,\bar C,\bar D$: 3 NAND gates (each input tied together).
• AND-term $\bar B\,\bar D$ realised as NAND: 1 gate.
• AND-term $\bar C D$ realised as NAND: 1 gate.
• Final output NAND combining the two product terms: 1 gate.

Total $= 3 + 1 + 1 + 1 = \mathbf{6}$ two-input NAND gates.

B --NAND(self)--> B'
D --NAND(self)--> D'
C --NAND(self)--> C'
B',D' --NAND--> g1
C', D --NAND--> g2
g1, g2 --NAND--> F

(a) Wheatstone bridge and balance condition

        A
       / \
     R1   R2
     /     \
    B--(G)--C      (G = galvanometer/detector)
     \     /
     R3   R4
       \ /
        D
   ( supply V across A-D )

The bridge is two voltage dividers (R1,R3) and (R2,R4) fed by source $V$. The detector reads the difference between nodes B and C. At balance the detector current is zero, so B and C are at equal potential:

$$\frac{R_3}{R_1+R_3} = \frac{R_4}{R_2+R_4} \;\Rightarrow\; \boxed{R_1 R_4 = R_2 R_3}$$

(b) Strain gauge calculation

Gauge factor relates fractional resistance change to strain:

$$GF = \frac{\Delta R/R}{\varepsilon}\;\Rightarrow\; \Delta R = GF\cdot\varepsilon\cdot R$$ $$\Delta R = 2.0 \times (750\times 10^{-6}) \times 120 = 2.0\times 0.00075\times 120 = \mathbf{0.18\,\Omega}$$

Quarter-bridge output (all arms initially equal to $R$, only one arm changes by $\Delta R$):

$$V_o \approx \frac{V}{4}\cdot\frac{\Delta R}{R} = \frac{5}{4}\times\frac{0.18}{120}$$ $$V_o = 1.25 \times 0.0015 = 0.001875\,\text{V} = \mathbf{1.875\,mV}$$

The small unbalance voltage (a few mV) is why strain-gauge bridges feed an instrumentation amplifier.

(a) Currents

With the Zener regulating, the load sees $V_Z = 6.2\,\text{V}$.

Load current:

$$I_L = \frac{V_Z}{R_L} = \frac{6.2}{1000} = 6.2\,\text{mA}$$

Series-resistor current:

$$I_s = \frac{V_{in}-V_Z}{R_s} = \frac{12-6.2}{330} = \frac{5.8}{330} = 17.58\,\text{mA}$$

Zener current (KCL: $I_s = I_Z + I_L$):

$$I_Z = I_s - I_L = 17.58 - 6.2 = \mathbf{11.38\,mA}$$

(b) Regulation check

Since $I_Z = 11.38\,\text{mA} > I_{Z(min)} = 5\,\text{mA}$, the Zener stays in breakdown and regulation is maintained; the output is held at $6.2\,\text{V}$.

(a) $r_e$ and base input resistance

Dynamic emitter resistance:

$$r_e = \frac{V_T}{I_E} = \frac{26\,\text{mV}}{1.5\,\text{mA}} = 17.33\,\Omega$$

Input resistance looking into the base (emitter bypassed):

$$r_{in(base)} = \beta r_e = 150\times 17.33 = 2600\,\Omega = \mathbf{2.6\,k\Omega}$$

(b) Voltage gain

For a fully bypassed CE stage:

$$A_v = -\frac{R_C}{r_e} = -\frac{3300}{17.33} = \mathbf{-190.4}$$

The negative sign indicates the $180^\circ$ phase inversion characteristic of the common-emitter configuration; magnitude $\approx 190$.

(a) Non-inverting amplifier

$$A_v = 1 + \frac{R_f}{R_1} = 1 + \frac{18}{2} = 1 + 9 = 10$$ $$V_o = A_v\, V_{in} = 10\times 0.4 = \mathbf{4.0\,V}$$

(b) Integrator

The ideal inverting integrator obeys:

$$V_o(t) = -\frac{1}{RC}\int_0^t V_{in}\,dt + V_o(0)$$

Time constant:

$$RC = 100\times 10^3 \times 0.1\times 10^{-6} = 0.01\,\text{s} = 10\,\text{ms}$$

For a constant input $V_{in} = -2\,\text{V}$ with $V_o(0)=0$:

$$V_o(t) = -\frac{1}{RC}\,V_{in}\,t = -\frac{1}{0.01}\times(-2)\times t = 200\,t$$

At $t = 5\,\text{ms} = 0.005\,\text{s}$:

$$V_o = 200\times 0.005 = \mathbf{+1.0\,V}$$

The output ramps up linearly because the input is a negative constant (inverting integration).

(a) Base conversions of $181$

Binary (repeated division by 2): $181 = 10110101_2$. Check: $128+32+16+4+1 = 181$. ✓

Octal (group bits in 3s from right: $10\,110\,101$ → $010\,110\,101$): $= 265_8$. Check: $2\times 64 + 6\times 8 + 5 = 128+48+5 = 181$. ✓

Hex (group bits in 4s: $1011\,0101$): $= \text{B5}_{16}$. Check: $11\times 16 + 5 = 176+5 = 181$. ✓

$$\boxed{(181)_{10} = (10110101)_2 = (265)_8 = (\text{B5})_{16}}$$

(b) Two's-complement subtraction $45 - 28$

$+45 = 00101101_2$

$+28 = 00011100_2$ → one's complement $11100011$ → two's complement $(-28) = 11100100_2$.

Add:

  00101101   (+45)
+ 11100100   (-28)
-----------
 100010001

Discard the carry out of bit 7 (the 9th bit): result $= 00010001_2 = 16+1 = 17$.

$$45 - 28 = \mathbf{17}\quad\checkmark$$

The carry-out is discarded and there is no overflow (operands have opposite signs), so the answer is correct and positive.

(a) Drain current (Shockley's equation)

$$I_D = I_{DSS}\left(1 - \frac{V_{GS}}{V_P}\right)^2 = 10\,\text{mA}\left(1 - \frac{-1.5}{-4}\right)^2$$ $$= 10\left(1 - 0.375\right)^2 = 10\times(0.625)^2 = 10\times 0.3906 = \mathbf{3.91\,mA}$$

(b) Transconductance

Maximum transconductance:

$$g_{m0} = \frac{2 I_{DSS}}{|V_P|} = \frac{2\times 10\,\text{mA}}{4\,\text{V}} = 5\,\text{mA/V} = \mathbf{5\,mS}$$

Transconductance at the operating point:

$$g_m = g_{m0}\left(1 - \frac{V_{GS}}{V_P}\right) = 5\,\text{mS}\times(1 - 0.375) = 5\times 0.625 = \mathbf{3.125\,mS}$$

(a) CRO sections

• Vertical section: amplifies/attenuates the input signal and applies it to the vertical (Y) deflection plates, controlling the height of the trace; its calibrated sensitivity (V/div) lets you read voltage amplitude.
• Horizontal / time-base section: generates an internal sawtooth (ramp) sweep applied to the horizontal (X) plates so the spot moves left-to-right at a known rate (time/div), displaying the signal as voltage versus time. A trigger circuit synchronises the sweep so the waveform appears stationary.

(b) Measurements

Peak-to-peak voltage:

$$V_{pp} = (\text{divisions})\times(\text{V/div}) = 6\times 0.5 = \mathbf{3.0\,V}$$

Peak voltage $V_m = V_{pp}/2 = 1.5\,\text{V}$. RMS value of a sine:

$$V_{rms} = \frac{V_m}{\sqrt 2} = \frac{1.5}{1.4142} = \mathbf{1.06\,V}$$

Period and frequency:

$$T = (\text{divisions/cycle})\times(\text{time/div}) = 4\times 0.2\,\text{ms} = 0.8\,\text{ms}$$ $$f = \frac{1}{T} = \frac{1}{0.8\times 10^{-3}} = 1250\,\text{Hz} = \mathbf{1.25\,kHz}$$