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A

Section A: Long Answer Questions

Attempt any TWO questions.

3 questions·10 marks each
1long10 marks

What is cache memory? Explain the different cache mapping techniques (direct, associative and set-associative) with suitable diagrams.

memorycache
2long10 marks

What is pipelining? Explain instruction pipelining with its stages. Discuss the different types of pipeline hazards and their solutions.

pipelining
3long10 marks

Explain the different modes of data transfer between CPU and I/O devices: programmed I/O, interrupt-driven I/O and DMA.

iointerrupt
B

Section B: Short Answer Questions

Attempt any EIGHT questions.

9 questions·5 marks each
4short5 marks

What is a system bus? Explain address bus, data bus and control bus.

bus
5short5 marks

What is DMA? Explain how direct memory access transfers data without CPU intervention.

dma
6short5 marks

Differentiate between RISC and CISC architectures.

risc-cisc
7short5 marks

Explain register transfer language with examples of micro-operations.

register-transfer
8short5 marks

Explain the algorithm for division of unsigned integers (restoring division) with an example.

arithmetic
9short5 marks

Explain the concept of microprogrammed control and microinstruction format.

control-unitmicroprogram
10short5 marks

What is virtual memory? Explain the concept of paging.

memoryvirtual
11short5 marks

Explain the instruction format and the types of instructions based on the number of addresses.

instruction
12short5 marks

Explain set-associative mapping technique of cache memory with an example.

cachemapping