BE Computer Engineering (Pokhara University) Microprocessor and Assembly Language Programming (PU, CMP 224) Question Paper 2079

(a) With a neat functional block diagram, explain the internal architecture of the 8085 microprocessor. In your answer, clearly describe the role of the ALU, the register array (including the temporary, accumulator, and flag registers), the timing and control unit, and the instruction decoder. (9 marks)

(b) Explain the purpose of the following 8085 hardware signals and state whether each is an input or an output: ALE, IO/M̄, READY, HLDA, and SID. (6 marks)

(a) The 8086 microprocessor is internally divided into the Bus Interface Unit (BIU) and the Execution Unit (EU). With a block diagram, explain the function of each unit and describe how the use of an instruction queue allows the 8086 to achieve a degree of pipelining (fetch–execute overlap). (9 marks)

(b) The 8086 generates a 20-bit physical address from two 16-bit values. Given CS = 348AH and IP = 4214H, compute the physical address of the next instruction to be fetched, showing all steps. Explain why this segmentation scheme is used. (6 marks)

Design the memory interface for an 8085-based system that requires 8 KB of EPROM (using two 4K × 8 chips) starting at address 0000H and 4 KB of RAM (using one 4K × 8 chip) placed immediately after the EPROM in the memory map.

(a) Show the complete address map, listing the starting and ending hexadecimal address of each chip. (5 marks)

(b) Draw the interfacing circuit using a 74LS138 (3-to-8 line decoder) for address decoding, clearly showing the address, data, and control line connections (RD̄, WR̄, IO/M̄). (10 marks)

(a) Write a well-commented 8085 assembly language program to find the largest number in a block of 10 unsigned 8-bit numbers stored in memory starting at location 2050H, and store the result at location 2060H. (9 marks)

(b) Differentiate between a subroutine (CALL/RET) and a macro, stating the advantages and disadvantages of each in terms of memory usage and execution speed. (6 marks)

Identify and explain the addressing mode used by each of the following 8086 instructions, stating how the effective address (or operand) is obtained:

(a) MOV AX, 1234H (b) MOV BX, [SI] (c) MOV CL, [BX+DI+4] (d) MOV AX, [2000H]

List the five hardware interrupts of the 8085 microprocessor in order of priority. Explain the key differences between maskable and non-maskable interrupts, and describe why TRAP is treated specially compared to the other interrupts.

The 8255A Programmable Peripheral Interface (PPI) is to be configured so that Port A is an input port in mode 0, Port B is an output port in mode 0, and Port C (lower) is an output while Port C (upper) is an input. Draw the control word format and determine the control word (in hexadecimal) to be written to the control register.

Explain the function of the 8253/8254 Programmable Interval Timer. Briefly describe any three of its operating modes (e.g., Mode 0, Mode 2, Mode 3) and state one practical application of each.

Explain the difference between a machine cycle, an instruction cycle, and a T-state in the 8085. Draw the timing diagram for the opcode fetch machine cycle and indicate the number of T-states it requires.

Write an 8086 assembly language program that uses DOS interrupt INT 21H to accept a single character from the keyboard and then display the next character in the ASCII sequence on the console. State which INT 21H function numbers you have used and their purpose.

Compare memory-mapped I/O and I/O-mapped (peripheral-mapped) I/O in the 8085 microprocessor. Discuss the differences in terms of the address space used, the instructions used for data transfer, and the control signals generated.

For the 8085 microprocessor, explain the effect of the following instructions on the flag register, and state the contents of the accumulator and the affected flags after execution, assuming A = 7FH before each instruction is executed independently:

(a) ADI 01H (b) ANI 0FH (c) RLC

Explain the role of the 8259A Programmable Interrupt Controller (PIC) in a microprocessor-based system. Describe how it expands the interrupt-handling capability of the processor and briefly explain the meaning of the Initialization Command Words (ICWs).