BE Computer Engineering (Pokhara University) Microprocessor and Assembly Language Programming (PU, CMP 224) Question Paper 2078
This is the official BE Computer Engineering (Pokhara University) Microprocessor and Assembly Language Programming (PU, CMP 224) question paper for 2078, as set in the regular annual examination. It carries 100 full marks and a time allowance of 180 minutes, across 11 questions. On Kekkei you can attempt this Microprocessor and Assembly Language Programming (PU, CMP 224) past paper online with a timer, get instant AI feedback and step-by-step solutions, and track the topics where you lose marks — completely free. Whether you are revising for your BE Computer Engineering (Pokhara University) Microprocessor and Assembly Language Programming (PU, CMP 224) exam or solving previous years' question papers, this 2078 paper is a great way to practise under real exam conditions.
Section A: Long Answer Questions
Attempt all / any as specified.
(a) With a neat functional block diagram, explain the internal architecture of the Intel 8086 microprocessor. Clearly distinguish between the roles of the Bus Interface Unit (BIU) and the Execution Unit (EU), and explain how instruction pipelining (queue) improves performance. (8 marks)
(b) Explain how a 20-bit physical address is generated in the 8086 from a segment register and an offset. Compute the physical address if CS = 2000H and IP = 1234H. (6 marks)
Write an 8086 assembly language program to find the largest number in an array of ten unsigned 8-bit numbers stored in consecutive memory locations starting at offset 2000H in the data segment, and store the result at offset 3000H. Explain the function of each instruction used, including the addressing modes and the role of the index/pointer registers.
(a) Design an interfacing circuit to connect 16 KB of EPROM and 16 KB of RAM to an 8086 microprocessor operating in minimum mode. Show the complete address map and the address decoding logic. (9 marks)
(b) Explain why the memory of the 8086 is organized into two banks (even and odd), and describe the function of the BHE and A0 signals during byte and word transfers. (5 marks)
(a) Describe the interrupt structure of the 8086. Explain the difference between hardware and software interrupts, and describe the sequence of operations the processor performs when an interrupt is recognized. (7 marks)
(b) What is the Interrupt Vector Table? Calculate the memory address in the vector table that holds the ISR address for interrupt type 21H. (5 marks)
Section B: Short Answer Questions
Attempt all / any as specified.
Explain any four addressing modes of the 8086 microprocessor with a suitable instruction example for each, indicating how the effective address is computed.
Draw the internal block diagram of the 8255A Programmable Peripheral Interface (PPI) and explain the function of its three ports and the control word in I/O mode (Mode 0).
Differentiate between memory-mapped I/O and I/O-mapped (isolated) I/O techniques. State the advantages and disadvantages of each, and mention which instructions are used to access ports in each scheme.
Explain the need for a Programmable Interrupt Controller (8259A) in an 8086-based system. Describe how it manages priority among multiple interrupt requests and how it is cascaded to handle more than eight interrupts.
(a) Explain the function of the following 8086 instructions with examples: XCHG, LEA, CMP, and LOOP. (4 marks)
(b) List the flags affected after executing the instruction ADD AL, BL when AL = 7FH and BL = 01H, and state their values. (2 marks)
What is a procedure (subroutine) in 8086 assembly language? Explain the difference between NEAR and FAR procedures, and describe how the CALL and RET instructions use the stack to transfer and return control.
Write short notes on any TWO of the following:
(a) 8253/8254 Programmable Interval Timer and its operating modes
(b) DMA data transfer and the role of the 8237 DMA controller
(c) Minimum mode versus maximum mode operation of the 8086