BE Computer Engineering (Pokhara University) Digital Logic (PU, ELX 110) Question Paper 2078

(a) Perform the following number system conversions, showing all intermediate steps: (i) Convert the decimal number $(189.625)_{10}$ to its binary, octal and hexadecimal equivalents. (ii) Convert the hexadecimal number $(2AF.C)_{16}$ to decimal.

(b) Using 8-bit 2's complement representation, perform the subtraction $(45)_{10} - (78)_{10}$ and verify your result.

(c) Differentiate between weighted and non-weighted codes. Encode the decimal number $(947)_{10}$ into BCD (8421) and into Excess-3 code.

(a) Simplify the following Boolean function using a four-variable Karnaugh map and obtain the minimal Sum-of-Products (SOP) expression:

Indicate all the prime implicants and the essential prime implicants on the map.

(b) For the function in part (a), also obtain the minimal Product-of-Sums (POS) expression.

(c) Realize the minimal SOP expression obtained in part (a) using only NAND gates and draw the logic diagram.

Design a synchronous sequential circuit (a Mod-6 counter that counts in the sequence $0 \to 1 \to 2 \to 3 \to 4 \to 5 \to 0$) using JK flip-flops.

(a) Draw the state diagram and write down the present-state/next-state table.

(b) Derive the excitation table for the JK flip-flops and obtain the simplified input equations using Karnaugh maps.

(c) Draw the complete logic circuit diagram and comment on how the unused states are handled.

(a) Design a full adder using the truth table approach. Obtain the simplified Boolean expressions for the SUM and CARRY outputs and draw its logic diagram.

(b) Implement the SUM output of the full adder using an 8-to-1 multiplexer.

(c) Explain how a 3-to-8 line decoder can be used to implement the following two functions simultaneously:

State and prove De Morgan's theorems for two variables. Using Boolean algebra, simplify the expression $Y = AB + A(B + C) + B(B + C)$ and express the result in its simplest form.

(a) Explain the operation of an SR latch using NOR gates and state its forbidden input condition. (b) What is meant by the 'race-around condition' in a JK flip-flop, and how does a master-slave configuration eliminate it?

(a) Differentiate between a synchronous counter and an asynchronous (ripple) counter. (b) Draw the logic diagram of a 4-bit Serial-In Parallel-Out (SIPO) shift register using D flip-flops and explain its operation.

Design a half subtractor and a full subtractor. Write down their truth tables, derive the Boolean expressions for the DIFFERENCE and BORROW outputs, and draw the logic diagram of the full subtractor.

(a) What is a multiplexer? With a neat block diagram and function table, explain the working of a 4-to-1 multiplexer. (b) Show how two 4-to-1 multiplexers and one additional gate can be used to construct an 8-to-1 multiplexer.

(a) Define a self-complementing code and give one example. (b) Convert the binary number $(10110110)_2$ into Gray code and convert the Gray code $(11011)_{Gray}$ back into binary. Show the bit-by-bit procedure.

Distinguish between Mealy and Moore models of a finite state machine using suitable block diagrams. State one practical advantage and one disadvantage of each model.

What are 'don't care' conditions in a logic function? Using a Karnaugh map, simplify the BCD function $F(A,B,C,D) = \sum m(1,3,5,7,9) + \sum d(10,11,12,13,14,15)$ and write the minimal SOP expression.