BE Computer Engineering (IOE, TU) Microprocessor (IOE, EX 551) Question Paper 2079
This is the official BE Computer Engineering (IOE, TU) Microprocessor (IOE, EX 551) question paper for 2079, as set in the regular annual examination. It carries 80 full marks and a time allowance of 180 minutes, across 11 questions. On Kekkei you can attempt this Microprocessor (IOE, EX 551) past paper online with a timer, get instant AI feedback and step-by-step solutions, and track the topics where you lose marks — completely free. Whether you are revising for your BE Computer Engineering (IOE, TU) Microprocessor (IOE, EX 551) exam or solving previous years' question papers, this 2079 paper is a great way to practise under real exam conditions.
Section A: Long Answer Questions
Attempt all / any as specified.
(a) Draw the internal block diagram of the 8086 microprocessor and explain the function of the Bus Interface Unit (BIU) and the Execution Unit (EU). How does the pipelining of these two units improve the performance of the processor? [10]
(b) The 8086 has a 20-bit address bus but its internal registers are only 16 bits wide. Explain how a 20-bit physical address is generated from the segment and offset registers. Calculate the physical address for CS = 1A2Bh and IP = 003Ch. [6]
Write an 8086 assembly language program to find the largest number in an array of ten 8-bit unsigned numbers stored in consecutive memory locations starting at offset 2000h in the data segment. Store the result at offset 3000h. Explain the working of the program with appropriate comments and state the addressing modes used for each data access.
(a) Differentiate between memory-mapped I/O and I/O-mapped (isolated) I/O with respect to address space, instructions used and decoding hardware. [6]
(b) Design an interfacing circuit to connect 8 KB of EPROM and 4 KB of RAM to an 8086 microprocessor. Show the address decoding logic and clearly indicate the address range assigned to each memory chip. [6]
(a) Explain the interrupt structure of the 8086 microprocessor. Differentiate between hardware and software interrupts, and describe how the processor responds to an INTR interrupt request. [6]
(b) What is an interrupt vector table? Where is it located in 8086 memory and how is the address of an interrupt service routine obtained from the interrupt type number? [4]
Section B: Short Answer Questions
Attempt all / any as specified.
Draw the internal block diagram of the 8255 Programmable Peripheral Interface (PPI). Explain the different operating modes (Mode 0, Mode 1 and Mode 2) and write the control word required to configure Port A as input and Port B as output, both in Mode 0.
Explain the following addressing modes of the 8086 microprocessor with a suitable example instruction for each: (a) Immediate addressing (b) Register indirect addressing (c) Based-indexed addressing (d) Register relative addressing
What is Direct Memory Access (DMA)? Explain how a DMA controller (such as the 8237) transfers data between memory and an I/O device using the HOLD and HLDA signals of the 8086, and state two advantages of DMA over program-controlled data transfer.
Describe the 8253/8254 Programmable Interval Timer. Explain any two of its operating modes and write the control word to program Counter 0 in Mode 3 (square wave generator) for binary counting, loading a 16-bit count.
Differentiate between the minimum mode and maximum mode of operation of the 8086 microprocessor. State the role of the MN/MX pin and explain why the 8288 bus controller is required in maximum mode.
Explain the purpose of the following 8086 instructions and show the effect of each on the relevant flags or registers:
(a) AAM
(b) XLAT
(c) LOOP
(d) CMPS
Describe the flag register of the 8086 microprocessor. Explain the function of the Auxiliary Carry flag, the Overflow flag, the Direction flag and the Trap flag.