BE Computer Engineering (IOE, TU) Digital Logic (IOE, EX 502) Question Paper 2079
This is the official BE Computer Engineering (IOE, TU) Digital Logic (IOE, EX 502) question paper for 2079, as set in the regular annual examination. It carries 80 full marks and a time allowance of 180 minutes, across 13 questions. On Kekkei you can attempt this Digital Logic (IOE, EX 502) past paper online with a timer, get instant AI feedback and step-by-step solutions, and track the topics where you lose marks — completely free. Whether you are revising for your BE Computer Engineering (IOE, TU) Digital Logic (IOE, EX 502) exam or solving previous years' question papers, this 2079 paper is a great way to practise under real exam conditions.
Section A: Long Answer Questions
Attempt all / any as specified.
(a) Perform the following arithmetic operations as indicated, showing all intermediate steps: (i) Subtract from using 2's complement method, and (ii) convert into its decimal and octal equivalents. [6]
(b) Define weighted and non-weighted codes. Explain the Gray code and the Excess-3 code with suitable examples, and state one practical application of each. [6]
(a) Simplify the Boolean function using a four-variable Karnaugh map. Obtain the minimal sum-of-products expression and implement it using only NAND gates. [8]
(b) State and prove DeMorgan's theorems for two variables, and prove that a positive logic X-OR gate is equivalent to a negative logic X-NOR gate. [4]
(a) Design a synchronous sequential circuit that detects the input sequence "1011" (overlapping allowed) and produces an output of 1 whenever the sequence is detected. Draw the state diagram, construct the state table, perform state assignment, and implement the circuit using JK flip-flops. Show the excitation table and the simplified flip-flop input equations. [10]
(b) Differentiate between a Moore machine and a Mealy machine. Explain the role of state reduction in sequential circuit design with an example. [6]
(a) Design a full adder using two half adders and explain its operation with a truth table. Show how four full adders can be cascaded to build a 4-bit binary parallel adder. [6]
(b) Implement the Boolean function using an multiplexer, and explain how the same function can be realized with a multiplexer. [4]
Section B: Short Answer Questions
Attempt all / any as specified.
Design a combinational logic circuit for a BCD-to-seven-segment display decoder for a common-cathode display. Write the truth table for any two of the output segments and derive their simplified Boolean expressions using K-maps.
What is the difference between a decoder and an encoder? Design an octal-to-binary priority encoder, write its truth table, and explain the need for priority in such encoders.
Explain the working of an SR latch using NOR gates and discuss its invalid state. Describe how a master-slave JK flip-flop eliminates the race-around condition, with the help of a timing diagram.
Explain the operation of a 4-bit Serial-In Parallel-Out (SIPO) shift register using D flip-flops. Draw its logic diagram and show the timing waveforms when the serial data 1101 is shifted in.
Design a MOD-10 asynchronous (ripple) counter using JK flip-flops. Draw the logic diagram and the output timing waveforms, and explain how the counter resets at the count of ten.
Differentiate between RAM and ROM. Explain how a combinational circuit can be implemented using a ROM, taking the example of a circuit that converts a 3-bit binary number to its square.
Distinguish between PLA and PAL with the help of their basic block diagrams. Implement the functions and using a PLA, and show the PLA programming table.
Define analog and digital signals. State the logic gate that acts as a universal gate and justify your answer by realizing the NOT, AND and OR operations using only that gate.
Design a 2-bit magnitude comparator that produces three outputs indicating , and . Write the truth table and the simplified output expressions.