BE Computer Engineering (IOE, TU) Digital Logic (IOE, EX 502) Question Paper 2078

(a) Perform the following number system conversions, showing all steps: (i) Convert the decimal number $(427.625)_{10}$ to its binary, octal and hexadecimal equivalents. (ii) Convert the hexadecimal number $(2AF.C)_{16}$ to decimal. (6 marks)

(b) Differentiate between weighted and non-weighted codes with examples. Encode the decimal number $(58)_{10}$ into BCD (8421), Excess-3 and Gray code, and explain one practical advantage of using Gray code in digital systems. (6 marks)

(a) State and prove De Morgan's theorems for two variables. Hence simplify the Boolean expression $F = \overline{(A + \overline{B})} + \overline{(\overline{A}\,C)}$ and implement it using only NAND gates. (5 marks)

(b) A logic function is given by $F(A,B,C,D) = \sum m(0,1,2,4,5,7,8,9,10,12,13,15)$. Simplify the function using a four-variable Karnaugh map, identify any don't-care groupings that arise, and draw the minimized logic circuit using basic gates. (7 marks)

(a) Explain the difference between synchronous and asynchronous (ripple) counters, clearly discussing the propagation delay limitation of ripple counters. (4 marks)

(b) Design a synchronous MOD-6 counter that counts in the sequence $0 \rightarrow 1 \rightarrow 2 \rightarrow 3 \rightarrow 4 \rightarrow 5 \rightarrow 0$ using JK flip-flops. Draw the state diagram, construct the excitation table, derive the simplified flip-flop input equations using K-maps, and draw the final circuit diagram. (12 marks)

(a) Design a full adder using two half adders and additional gates. Write its truth table and derive the expressions for SUM and CARRY. (6 marks)

(b) Show how a $4$-to-$1$ multiplexer can be used to implement the Boolean function $F(A,B,C) = \sum m(1,2,4,7)$ by treating $A$ and $B$ as select lines. Draw the implementation, clearly indicating the data input connections. (6 marks)

Perform the subtraction $(35)_{10} - (52)_{10}$ using the 8-bit 2's complement method. Show the binary representation of each operand, the addition step, and interpret the final result including its sign.

Explain the operation of a 3-to-8 line decoder. Draw its block diagram and truth table, and show how two such decoders together with an enable input can be combined to build a 4-to-16 line decoder.

Distinguish between a latch and a flip-flop. Explain the working of a JK flip-flop with its truth table, and describe how the race-around condition occurs and how a master-slave configuration eliminates it.

Explain the operation of a 4-bit Serial-In Parallel-Out (SIPO) shift register with a neat diagram. Illustrate the contents of the register after each clock pulse when the serial input sequence $1011$ is applied (LSB first).

Differentiate between RAM and ROM. Briefly explain the internal organization of a ROM and show how a ROM can be used to implement the combinational functions $F_1 = \sum m(0,2,5,7)$ and $F_2 = \sum m(1,3,4,6)$ of two variables... (extend to three input variables) using a single ROM.

Compare PROM, PLA and PAL in terms of the programmability of their AND and OR arrays. Draw the basic structure of a PLA and explain why it is more flexible than a PROM for implementing arbitrary sum-of-products functions.

(a) Prove that the NAND gate is a universal gate by realizing the NOT, AND and OR functions using only NAND gates. (4 marks)

(b) Express the XOR function $Y = A \oplus B$ using NAND gates only. (2 marks)

Design a 1-bit magnitude comparator that compares two bits $A$ and $B$ and produces three outputs indicating $A > B$, $A = B$ and $A < B$. Write the truth table and derive the output expressions.